Family:
fmax-Min:
High Level Output Current:
JESD-30 Code:
Logic Family:
Low Level Output Current:
Maximum Propagation Delay Time @ Maximum CL:
Number of Bits:
Number of Elements:
Number of Inputs:
Number of Outputs:
Number of Pins:
Number of Terminals:
Output Polarity:
Output Type:
Package:
Package Shape:
Package Type:
Pin Count:
Power Supply Current-Max (ICC):
Propagation Delay:
Propagation Delay (tpd):
Reach Compliance Code:
Seated Height-Max:
Surface Mount:
Terminal Form:
Terminal Pitch:
Terminal Position:
Thickness:
Logical Function:
Output Signal Type:
Clock-Edge Trigger Type:
Filter:
7 Records
RFQ
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